Availability:
Presently all boards have EP1S30F780C5 FPGA's.
Q5V1 - in stock, immediate shipping
Q5V2 - 6 week lead time
Q5V4 - 6 week lead time

Rowe Engineering is currently shipping Q5 series ALTERA FPGA development boards Q5V1 (picture below), Q5V2, and Q5V4. Each board has 1, 2, or 4 STRATIX FPGA devices respectively.

Availability:
Presently all boards have EP1S30F780C5 FPGA's.
Q5V1 - in stock, immediate shipping
Q5V2 - 6 week lead time
Q5V4 - 6 week lead time

Model Q5 Series Description:
The Q5 series FPGA development boards are easy to use prototype boards that incorporate up to 4 ALTERA STRATIX devices. A ByteBlasterMV cable from ALTERA connected to a parallel port of a computer is all you need. You will be up and running quickly after removing the board from its packaging. Multiple devices allow the user to partition their algorithms and minimize compile time. The Q5 boards are designed towards communications based processing development activities and optical applications utilizing the LVDS interface.

Flexible I/O ports allow the user to cascade Q5 boards easily as well as interface to analog conversion devices. Additional ports may be used to connect a logic analyzer as well. Furthermore, ports are available to inject high or low constant logic signals for use as control bits. Each ALTERA device has its own independent set of ports. The block diagram is shown in figure 1 below. As can be seen, each ALTERA device can communicate with any other ALTERA device either on a dedicated or broadcast basis. All ports are bi-directional and can be partially allocated to be input and output ports simultaneously under user control.

The LVDS is setup with edge connectors on the board as shown in Figure 1. FPGA#1 and FPGA#3 each have LVDS receiver ports on the connectors. FPGA#2 and FPGA#4 each have LVDS transmitter ports on the connectors.

Rowe Engineering offers the Q5 series with your choice of ALTERA STRATIX device.

Model Q5V4 (Q5V1 shown above) features:

Up to 4 ALTERA EP1S30 devices. Others will be supported once they become available.

Cypress Roboclock timing generator for operating speed up to 200 MHz. User selectable output skew. Input frequency multiplier configuration. Bypass mode available as well to operate directly off a user supplied clock without the Roboclock.

Flash EPROM (EPC16) and JTAG downloading support for all 4 ALTERA devices.

On board power regulation. A single external 3.3v power supply is required.

Multiple I/O ports for easy interfacing to analog converters, user control bits or additional Q5/Q4 series boards. No need for ELA support.

4 LED's per ALTERA device for user defined functions. "Configuration done" LED indicates successful configuration.

External clock via SMA connector or socket for an on-board crystal oscillator. An additional SMA connector is supplied for providing a clock reference to other boards. Q5V2 and Q5V4 boards have 2 sets of SMA connectors and 2 Roboclocks to allow multiple user independent clocking sources per board.

Board mounted pushbutton switch allows all 4 ALTERA devices to be cleared internally.

Fixed connection between ALTERA devices. Quartus configuration files and simple VHDL diagnostic programs are supplied with each board.

Up to 16 LVDS transmit and receive channels per Altera chip. One differential LVDS transmit and one differential LVDS receiver clock per Altera chip. The user can substitute 32 general LVTTL I/O signals for the 16 LVDS receiver signals in the event LVDS receiver function is not needed. Similarly, the user can substitute 34 general LVTTL I/O signals for the 16 LVDS transmiter signals and LVDS transmit clock in the event LVDS transmitter function is not needed.